Wednesday, October 8, 2014

Soldering the Launchpad Xtal

In this article I will talk about soldering the 32768 Hz quartz Xtal that is provided with the G2 Launchpad.
This article is a rewrite in english of one article in my spanish twin blog Aim65. 
The 32768 Hz Xtal is the basis of a real time clock. In fact 2^15 clock cycles of that device correspond to one second. In the MSP340 familly we can use the Watchdog in timer mode associated to it to generate one interrupt each second.

Launchpad and Xtal bag

This Xtal is included with the Launchpad package but it is not soldered on the board. As  this device uses two MCU pins, you lose two I/O lines when you solder it on the board. It's up to you to decide what is better: a 32768 Xtal or two I/O lines.

The following figure show the position where the Xtal should be soldered.

Xtal Location

This Xtal is tiny and somewhat difficult to solder. The easiest way to proceed is to fix it in place by means of adhesive tape. Beware that the Xtal is not symmetrical. When correctly laid on the board the contacts should touch the soldering pads.

Xtal fixed with adhesive tape
A good soldering iron and a magnifier helps soldering the Xtal.

Xtal soldered on the board
When the Xtal terminals are soldered we can take out the adhesive tape and then we can solder the Xtal body to the pad located below it.

Xtal soldered at the three points
After the Xtal is soldered we should check its correct operation. I have developed a little program to do that. It compiles under MSP-GCC and contain two main files: main.c and io430masks.h.

main.c

/*
Test Clk32
Simple program to test if the Clk32 clock is operating ok
If operates ok blinks Green LED (changes every second)
If operates bad fixes Red LED of Green LED blinks at different rate
02/05/2012: Corrected a confict with P1DIR that was accessed by the
WDT Timer Interrupt and the main program.
*/
// Include the register definitions.
// msp430h calls the msp430g2553h, but this last file is
// included also to ease the eclipse error checker
#include <msp430.h>
//#include <msp430g2231.h>
#include <msp430g2553.h>
#include <legacymsp430.h> // Needed for interrupts
#include "io430masks.h" // My SET/RESET macros
// Defines --------------------------------------------------
#define LED_RED BIT0 // Red LED at P1.0 Pulses with the Reed switch
#define LED_GREEN BIT6 // Green LED at P1.6
// Functions ------------------------------------------------
// Simple delay function
void simpleDelay()
{
__delay_cycles(1000);
}
// Tries to Start of the Clk32 clock
// Uses default value of DIVA_0
void startClk32()
{
do
{
SET_FIELD(BCSCTL3,XCAP_MASK,XCAP_3); // Set 12.5pF
CLEAR_FIELD(BCSCTL3,LFXT1S_MASK); // Set mode 0
simpleDelay();
}
while (BCSCTL3&LFXT1OF); // Loop while faulty
}
// Configure all the peripherals
void configureAll()
{
// Set LEDs as output
SET_FLAG(P1DIR,LED_RED+LED_GREEN);
// Red Led while not operating the 32k Clock
SET_FLAG(P1OUT,LED_RED);
// If device has port 3 but 20 pins
#ifdef __MSP430_HAS_PORT3_R__
P3REN=0xFF;
#endif
// Start the 32k clock
startClk32();
// If started turn off red led
RESET_FLAG(P1OUT,LED_RED);
// Configure WDT as a timer
WDTCTL=WDT_ADLY_1000; // t=32768/fACLK=1s
SET_FLAG(IE1,WDTIE); // Enable WDT interrupt
}
int main() // The main function
{
// Disable the watchdog.
WDTCTL = WDTPW + WDTHOLD;
// Configure all the peripherals
configureAll();
// Enable interrupts
eint();
// do forever:
while (1)
{
__delay_cycles(10000);
dint();
if (BCSCTL3&LFXT1OF)
SET_FLAG(P1OUT,LED_RED);
else
RESET_FLAG(P1OUT,LED_RED);
eint();
};
return 0;
}
/****************** RSI Functions **********************/
// Watchdog timer interrupt
// Called each second
interrupt(WDT_VECTOR) WDT_ISR(void)
{
// Don't need to clear any flag
// Toggle GREEN Led
P1OUT^=LED_GREEN;
}
view raw main.c hosted with ❤ by GitHub


io430masks.h

/*********************************************
Masks for register bit fields
(c) VJS
Version 28-06-2011
Modificaciones:
28-06-2011 : Version inicial
17-04-2012 : Cambios en la definicion de algunas mascaras
**********************************************/
/*********************************************
Example for a 8 bit register REG with
1 bit field BIT
2 bit field F0,F1
REG|=BIT To set BIT
REG&=~BIT To clear BIT
For F0,F1 a mask is defined:
F01_MASK = (0xFF-3*F0)
REG&=F01_MASK To clear field
REG=(REG&F01_MASK)+F0 To set F0 and not F1
REG=(REG&F01_MASK)+F1 To set F1 and not F0
REG=(REG&F01_MASK)+F0+F1 To set F0 and F1
REF=(REG&F01_MASK)+(F0*value) To set value 0..3
***********************************************/
/*************** BASIC DEFINITIONS *****************
This definitions define the following macros:
SET_FLAG(REGISTER,FLAG) Set a 1 bit flag
RESET_FLAG(REGISTER,FLAG) Reset a 1 bit flag
RESET_FIELD(REGISTER,MASK) Clear a multibit field
SET_FIELD(REGISTER,MASK,VALUE)
Set a multibit field (value must be consistent with mask)
SET_FIELD_WOFFSET(REGISTER,MASK,VALUE,OFFSET)
Set a multibit field adding an offset
El nombre del campo referencia al ultimo bit del campo, no el primero
** Posibilidad de modificar las macros para usar BIS y BIC
***************************************************/
#define SET_FLAG(REGISTER,FLAG) REGISTER|=(FLAG)
#define RESET_FLAG(REGISTER,FLAG) REGISTER&=~(FLAG)
#define CLEAR_FIELD(REGISTER,MASK) REGISTER&=(MASK)
#define SET_FIELD(REGISTER,MASK,VALUE) REGISTER=(REGISTER&(MASK))+VALUE
#define SET_FIELD_WOFFSET(REGISTER,MASK,VALUE,OFFSET) REGISTER=(REGISTER&(MASK))+((VALUE)*(OFFSET))
#define GET_FIELD(REGISTER,MASK) (REGISTER&(MASK))
/**************** ADC 10 **********************/
#ifdef __MSP430_HAS_ADC10__
/* ADC10CTL0 @ 0x01B0 ADC10 Control 0 */
#define ADC10SHT_OFFS (0x800u)
#define ADC10SHT_MASK (0xFFFF-3*ADC10SHT_OFFS) /* 2 bit mask */
#define ADC10SREF_OFFS (0x2000u)
#define ADC10SREF_MASK (0xFFFF-7*ADC10SREF_OFFS) /* 3 bit mask */
/* ADC10CTL1 @ 0x01B2 ADC10 Control 1 */
#define ADC10CONSEQ_OFFS (2u)
#define ADC10CONSEQ_MASK (0xFFFF-3*ADC10CONSEQ_OFFS) /* 2 bit mask */
#define ADC10SSEL_OFFS (8u)
#define ADC10SSEL_MASL (0xFFFF-3*ADC10SSEL_OFFS) /* 2 bit mask */
#define ADC10DIV_OFFS (0x20u)
#define ADC10DIV_MASK (0xFFFF-7*ADC10DIV_OFFS) /* 3 bit mask */
#define SHS_OFFS (0x400u)
#define SHS_MASK (0xFFFF-3*SHS_OFFS) /* 2 bit mask */
#define INCH_OFFS (0x1000u)
#define INCH_MASK (0xFFFFu-0xF*INCH_OFFS) /* 4 bit mask */
#endif
/********* BASIC CLOCK MODULE ****************/
#ifdef __MSP430_HAS_BC2__
/* DCOCTL @ 0x0056 DCO Clock Frequency Control */
#define MOD_OFFS (MOD0)
#define MOD_MASK (0xFF-0x1F*MOD0) /* 5 bit mask */
#define DCO_OFFS (DCO0)
#define DCO_MASK (0xFF-7*DCO0) /* 3 bit mask */
/* BCSCTL1 @ 0x0057 Basic Clock System Control 1 */
#define RSEL_OFFS (RSEL0)
#define RSEL_MASK (0xFF-0xF*RSEL0) /* 4 bit mask */
#define DIVA_OFFS (DIVA0)
#define DIVA_MASK (0xFF-0x3*DIVA0) /* 2 bit mask */
/* BCSCTL2 @ 0x0058 Basic Clock System Control 2 */
#define DIVS_OFFS (DIVS0)
#define DIVS_MASK (0xFF-0x3*DIVS0) /* 2 bit mask */
#define DIVM_OFFS (DIVM0)
#define DIVM_MASK (0xFF-0x3*DIVM0) /* 2 bit mask */
#define SELM_OFFS (SELM0)
#define SELM_MASK (0xFF-0x3*SELM0) /* 2 bit mask */
/* BCSCTL3 @ 0x0053 Basic Clock System Control 3 */
#define XCAP_OFFS (XCAP0)
#define XCAP_MASK (~(XCAP0|XCAP1)) /* 2 bit mask */
#define LFXT1S_OFFS (LFXT1S0)
#define LFXT1S_MASK (~(LFXT1S0|LFXT1S1)) /* 2 bit mask */
#define XT2S_OFFS (XT2S0)
#define XT2S_MASK (0xFF-0x3*XT2S0) /* 2 bit mask */
#endif
/******** FLASH MEMORY *************************/
#ifdef __MSP430_HAS_FLASH2__
/* FCTL2 @ 0x012A FLASH Control 2 */
#define FN_OFFS (FN0)
#define FN_MASK (0xFF-0x3F*FN0) /* 6 bit mask */
#define FSSEL_OFFS (FSSEL0)
#define FSSEL_MASK (0xFF-0x3*FSSEL0) /* 2 bit mask */
#endif
/******* DIGITAL I/O PORTS 1/2 *****************/
/* No definitions are needed here */
/********** TIMER A2 ***************************/
#ifdef __MSP430_HAS_TA2__
/* TAIV @ 0x012E Timer A Interrupt Vector Word (Read Only) */
#define IRQ_OFFS (0x0x2)
#define IRQ_MASK (0xFFFF-7*IRQ_OFFS) /* 3 bit mask */
/* Mask not normally needed as it is read only !!! */
/* TACTL @ 0x0160 Timer A Control */
#define TAMC_OFFS (0x10u)
#define TAMC_MASK (0xFFFF-3*TAMC_OFFS) /* 2 bit mask */
#define TAID_OFFS (0x40u)
#define TAID_MASK (0xFFFF-3*TAID_OFFS) /* 2 bit mask */
#define TASSEL_OFFS (0x100u)
#define TASSEL_MASK (0xFFFF-3*TASSEL_OFFS) /* 2 bit mask */
/* TACCTL0 @ 0x0162 Timer A Capture/Compare Control 0 */
#define OUTMOD_OFFS (0x20u)
#define OUTMOD_MASK (0xFFFF-0x7*OUTMOD_OFFS) /* 3 bit mask */
#define CCIS_OFFS (0x1000u)
#define CCIS_MASK (0xFFFF-0x3*CCIS_OFFS) /* 2 bit mask */
#define CM_OFFS (0x4000u)
#define CM_MASK (0xFFFF-0x3*CM_OFFS) /* 2 bit mask */
/* TACCTL1 @ 0x0164 Timer A Capture/Compare Control 1 */
/* Las máscaras son iguales a las de TACCTL0 */
/* Aditional Definitions */
#define TAIV_NONE 0x00
#define TAIV_TACCR1 0x02
#define TAIV_TACCR2 0x04
#define TAIV_TAIFG 0x0A
#endif
/************** USI ****************************/
#ifdef __MSP430_HAS_USI__
/* USICKCTL @ 0x007A USI Clock Control Register */
#define USISSEL_OFFS (USISSEL0)
#define USISSEL_MASK (0xFF-7*USISSEL0) /* 3 bit mask */
#define USIDIV_OFFS (USIDIV0)
#define USIDIV_MASK (0xFF-7*USIDIV0) /* 3 bit mask */
/* USICNT @ 0x007B USI Bit Counter Register */
#define USICNT_OFFS (USICNT0)
#define USICNT_MASK (0xFF-0x1F*USICNT0) /* 5 bit mask */
#endif
/************** WATCHDOG **********************/
/* Mask cannot be used as it is protected by a password */
/************** COMPARATOR A *****************/
#ifdef __MSP430_HAS_COMPA__
/* CACTL1 @ 0x0059 Comparator A Control 1 */
#define CAREF_OFFS (CAREF0)
#define CAREF_MASK (0xFF-0x3*CAREF0) /* 2 bit mask */
/* CACTL2 @ 0x005A Comparator A Control 2 */
#define P2CA_OFFS (P2CA0)
#define P2CA_MASK (0xFF-0x3*P2CA0) /* 2 bit mask */
/* Definitions for missing signals in .h */
#define P2CA2 BIT4
#define P2CA3 BIT5
#define P2CA4 BIT6
#define CASHORT BIT7
#define SELP_MASK (0xFF-P2CA0-P2CA4)
#define SELP_NONE (0x00)
#define SELP_CA0 (P2CA0)
#define SELP_CA1 (P2CA4)
#define SELP_CA2 (P2CA0+P2CA4)
#define SELN_MASK (0xFF-7*P2CA1)
#define SELN_NONE (0x00)
#define SELN_CA1 (1*P2Ca1)
#define SELN_CA2 (2*P2Ca1)
#define SELN_CA3 (3*P2Ca1)
#define SELN_CA4 (4*P2Ca1)
#define SELN_CA5 (5*P2Ca1)
#define SELN_CA6 (6*P2Ca1)
#define SELN_CA7 (7*P2Ca1)
#endif
view raw io430masks.h hosted with ❤ by GitHub



The program tries to start the oscillator associated to the Xtal. If it works ok, the green LED blinks every second. If the oscillator could not start, it lights the red LED.

If the oscillator cannot start we must first check the soldering.

The oscillator is quite sensible to any interference. The oscillator pins are connected to the J2 header as they can also be used for I/O. This connection includes two zero Ohm resistors in the path. To minimize any interference those lines can be disconnected desoldering those resistors.

Resistors removed

Alternative to soldering the Xtal

If you don't want to mess with the board or you don't want to permanently eliminate two I/O lines you can connect a Xtla to the J2 lines associated to the oscillator.
That can be done using the Xtal provided with the Launchpad but its size makes it a little complex. Moreover 32768 Xtals are cheap and easy to obtain. It is important, however, to buy ones designed to operate with 12,5pF or 6pF capacitors. As the MCU includes those capacitor options inside you don't need to add them using discrete components.
This is the Xtal I have bought at Farnell, for instance:

Xtal soldered to a female header
I have soldered it to a two pin female header to be easily connected to the oscillator J2 pins.

Xtal at J2
Connecting the Xtal at J2 increase its wire lenght and could give some interferences. The proper solution is to solder it on board if possible.

With the Xtal mounted on the board its easy to develop any application that should keep a real time clock.

Posted by at
Labels: , ,

No comments:

Post a Comment

Subscribe to: Post Comments (Atom)